Silicon Wafer Bonding Technology for VLSI and MEMS Applications
The Institution of Engineering and Technology, 2002
eISBN: 978-1-84919-370-2 | Cloth: 978-0-85296-039-4
Library of Congress Classification TK7871.85.S549 2002
Dewey Decimal Classification 621.38152
eISBN: 978-1-84919-370-2 | Cloth: 978-0-85296-039-4
Library of Congress Classification TK7871.85.S549 2002
Dewey Decimal Classification 621.38152
ABOUT THIS BOOK | TOC
ABOUT THIS BOOK
By bonding a thin wafer of active silicon to a thicker wafer via a layer of insulating oxide to form an SOI structure it is possible to substantially improve the performance and integration of microelectronic circuits produced by very large scale integration (VLSI). For example, the recently announced IBM Power 4 'server-ona- chip' integrates two microprocessors, a high bandwidth system switch, a large memory cache and input/output functions. SOI wafer bonding is also an enabling technology in the rapidly growing field of microelectromechanical systems (MEMS).
See other books on: Circuits | Integrated circuits | Semiconductors | Very large scale integration | VLSI & ULSI
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