Silicon Wafer Bonding Technology for VLSI and MEMS Applications
edited by Subramanian S. Iyer and Andre J. Auberton-Hervé
The Institution of Engineering and Technology, 2002
eISBN: 978-1-84919-370-2 | Cloth: 978-0-85296-039-4
Library of Congress Classification TK7871.85.S549 2002
Dewey Decimal Classification 621.38152


By bonding a thin wafer of active silicon to a thicker wafer via a layer of insulating oxide to form an SOI structure it is possible to substantially improve the performance and integration of microelectronic circuits produced by very large scale integration (VLSI). For example, the recently announced IBM Power 4 'server-ona- chip' integrates two microprocessors, a high bandwidth system switch, a large memory cache and input/output functions. SOI wafer bonding is also an enabling technology in the rapidly growing field of microelectromechanical systems (MEMS).

Engineers who are developing volume production systems employing wafer bonding are in need of guidance from experts in the industry who have been pioneering the field and the book is designed for this purpose. It briefs the process development engineer on the latest emerrging technology, giving the reader the benefit of RandD by companies at the forefront of SOI, and also describes the basic principles. Applications in CMOS, photonics, optoelectronics and MEMS are discussed , there is a glossary of terms used in the field and a table comparing the various bonding methods. Although the main focus is on SOI there is also an appendix which describes a practical silicon-to-silicon bonding process and gives useful information relevant to wafer bonding in general.

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